Keynote Speakers

Bertrand VILQUIN                                                Ferroelectric HfO2 based devices fabrication and remaining issues

New computer generations require micro-processors in close proximity to non-volatile memories (NVM), both working with low power consumption and high write speed. Since current FLASH technology cannot perform at these specifications, new memory solutions are necessary. Novel HfO2 based NVM cells could offer the required properties and have the advantage that HfO2 is already known for its compatibility with CMOS processing as shown in standard state-of-the-art logic nodes.

In contrast, current FRAM products on the market are limited by the properties of the ferroelectric PbZrTiO3 material resulting in scaling limitations.

With the discovery of ferroelectricity in doped HfO2 the introduction into scaled non-volatile memory devices based on a one-transistor one-capacitor (1T-1C FRAM) or a one-transistor (1T FeFET) cell became possible. HfO2 shows ferroelectric properties when doped with a variety of different dopants in ~5-20 nm thin thickness range which enables further scaling of current memory devices. This presentation presents the current status of hafnium oxide material and based memory devices and their remaining issues.

Bertrand Vilquin has been working on integration of perovskite materials since the beginning of his PhD in 1999 at Université de Caen (France). In 2002, he joined the Institute for Scientific and Industrial Research at Osaka University (Japan). Then, he moved to Université Paris XI to work on an industrial project with ALTIS Semiconductors. In 2006, he became lecturer at Ecole Centrale de Lyon working on the integration of perovskite materials on silicon. He has a rich experience in both national and international research projects and had been the coordinator of two ANR projects. He is coordinator of the “Nanoscale Engineering” Master training of Université de Lyon (http://master-nano.universite-lyon). Since May 2016, he is also associate professor at the Université de Sherbrooke (Canada) and member of the “bureau” of GDR “Oxyfun” (

Vazgen Sh. Melikyan

Professor, Corresponding Member of National Academy of Science of Armenia, Doctor of Technical Sciences, Honorable Scientist of Armenia, Director of Educational Department of Synopsys Armenia CJSC, Head of “Microelectronic Circuits and Systems” (MCS) Chair of National Polytechnic University of Armenia (NPUA).

He was granted the degree of Doctor of Technical Sciences in SEUA, Yerevan, 2006 and Academic rank of Professor in Technical Sciences in SEUA, Yerevan, 2006. In 2010 he was selected as an Academician of Engineering Academy of RA. In 2014 he was selected as a Corresponding Member of National Academy of Sciences of RA.  He has been the head of various international projects. On September 18, 2007 by decree of RA President he has been conferred the title of Honorable Scientist of the Republic of Armenia. On April 10, 2010 by decree of RA President he has been conferred “President of the Republic Prize” in “Technical Sciences and Information Technologies” area. In 2011 he was awarded with Gold medal of NPUA. In the same year Yerevan State University awarded him with a Diploma “For Achievements in Science and Significant Contribution in University Education Development”, as well as Honorable Medal of European Regional Educational Academy 10-year Anniversary. He is also Honorary Professor of National Research University MIET since 2012 and European University. He is the author of 11 monographs, more than 280 scientific and 135 methodical publications, had more than 150 reports in international conferences. 54 PhD dissertations have been realized and successfully defended under his supervision.

                                                                                       FinFET IC Design: Challenges and Solutions

During the past decades shrinking of MOSFET transistors and decreasing future sizes of CMOS technology were driving increasing IC complexity. However physical phenomenon occurring in MOS transistors shrunk below 28nm gate size such as increasing leakage currents, decreasing short channel effects, etc. significantly affect circuit operation making usage of MOS transistor of such sizes ineffective. The solution for further decreasing of future size is switching to new kind of devices that could be used as a replacement for MOSFETs while avoiding negative impact of downsizing. FinFET transistors are one of the options that are used as a solution for these issues. Basics of FinFET transistors, their variants and advantages are presented. Novel circuit topologies using FinFETs are presented also covering specifics of physical design implementation of FinFET-based circuits. The problems that occur in the result of further scaling of ICs, built by FinFET technology are shown. Solutions, aimed at deteriorating traditional and new challenges are observed. In addition current work implemented in Synopsys Armenia Education Department for creating Educational Design Kit using 14nm FinFET transistors are covered.

Dr. Juri Jatskevich

Dr. Juri Jatskevich is presently a Professor of Electrical and Computer Engineering at the University of British Columbia, Vancouver, Canada. Dr. Jatskevich is active in IEEE Power & Energy Society (PES), Circuits and Systems Society (CAS), and Power Electronics Society (PELS), and is an IEEE Fellow for contributions to modeling of electric machines and switching converters. He has authored/co-authors over 90 journal articles and over 120 conference papers. He chaired the IEEE CAS Power Systems & Power Electronic Circuits Technical Committee in 2009-2010. He has served as an Associate Editor for the IEEE Transactions on Power Electronics for the period 2008 – 2013, the Editor-In-Chief of IEEE Transactions on Energy Conversion and Editor of IEEE Power Engineering Letters for the period 2013 – 2019, and is presently the Editor-In-Chief (EIC) at Large of IEEE Power & Energy Society (PES) Journals. He was the general chair of the Sixteenth IEEE Workshop on Control and Modeling for Power Electronics (COMPEL 2015), which is a flagship event in Power Electronics society. He is also chairing the IEEE Task Force on Dynamic Average Modeling, under Working Group on Modeling and Analysis of System Transients Using Digital Programs. His research interests include power electronic systems, electrical machines and drives, modeling and simulation of electromagnetic transients.

Importance of Publishing Manuscripts in IEEE Journals for Ukraine

This plenary talk aims at helping Ukrainian scientists, researchers, and engineers interested in publishing their research articles in top tier journals indexed by Scopus, such as IEEE journals, and to become more successful authors. The current Editor-In-Chief (EIC) at Large of IEEE Power & Energy Society (PES) Journals will discuss the role of publications in international scientific community, ranking of universities, and career advancements. Examples of most competitive and prestigious journals in the area of Energy and Power Engineering indexed by Scopus and Web of Science will be presented. To help prospective authors select the most appropriate venue for publishing their work, the scope and emphasis of several IEEE journals of will be briefly to give example. Possible practices and steps for increasing participation in international scientific community through publications will be presented as well.

Seminar 1: “Switching to Embedded Linux: the advantages, drawbacks and perspectives”

By: Department of Design of Electronic Digital Equipment (DEDEC), Igor Sikorsky Kyiv Polytechnic Institute, Ukraine


  1.   The retrospective of how embedded systems had evolved over the last decades. The most significant challenges
  2. Embedded Linux: pros and cons for your projects. Overview of possible alternatives
  3. Real-time vs general-purpose operating systems. Comparison of real-time solutions: Linux RT patches, QNX, FreeRTOS
  4. Prerequisites to start with. Available development boards and some of their flaws. The recommended software and hardware tools to use. Building your team workflow when developing an Embedded Linux project
  5. Perspectives of using Embedded Linux in SoC FPGA based systems

Upon completion this seminar, participants will learn:

  1. Why and when is it worth switching from bare metal to an Embedded Linux
  2. Possible solutions when real-time is required
  3. What are the common pitfalls with the existing development boards. How to properly select a chip for your board running Embedded Linux. In which cases it proves better to design a custom development board
  4. What tools to use when working on Embedded Linux project. How Yocto and Buildroot could come in handy dealing with it
  5. Opportunities the Embedded Linux brings to SoC FPGA based designs

Lecturer: Tymofii Khodniev, Lecturer of the DEDEC Department

Approximate duration of the seminar: 60 minutes

Seminar 2: “Performance Optimization with Stratix 10 HyperFlex Architecture”

By: Department of Design of Electronic Digital Equipment (DEDEC), Igor Sikorsky Kyiv Polytechnic Institute, Ukraine


  1. Introduction to Stratix 10 HyperFlex Architecture
  2. HyperFlex Optimization Strategy
  3. Quartus Prime Hyper-Aware Design Flow
  4. Compilation Flow with Fast-Forward Compile
  5. Hyper-Retiming

Upon completion this seminar, participants will learn what is:

  1. HyperFlex Architecture
  2. HyperFlex Architecture advantages
  3. HyperFlex Compilation Flow and Fast Forward Compile
  4. Hyper-Retiming and how does its work

Lecturer: Oleksandr Antonyuk, Senior Lecturer of the DEDEC Department

Approximate duration of the seminar: 60 minutes

To contact organizer:           Prof. Oleksandr Lysenko,      E-mail:

tel. +380 44 204-93-63, 204-95-38

room 339, building 12